• i.MX6q
• imx-repo - imx-6.6.52-2.2.0
• U-BOOT - 2024.04
• KERNEL - 6.6.52

Analysis

LCD Datasheet

TX26D211VM0BAA.pdf

• Data Format이 VESA와 일치하므로 data-mapping은 SPWG
• 4개 Tx Line이므로 R,G,B 8/8/8(24)에 해당하는 것으로 판단됨

Device Tree

• csi가 아닌 display 출력이므로 lvds를 위한 pinctrl을 불필요함
• lcd의 datasheet를 확인하여 data-mapping과 data-width 및 timing 정보를 입력
• drm 없이 framebuffer로 처리하는 것이 목표이므로 추가 설정 불필요함

&mxcfb1 {
    compatible = "fsl,mxc_sdc_fb";
    disp_dev = "ldb";
    interface_pix_fmt = "RGB24";
    default_bpp = <24>;
    int_clk = <0>;
    late_init = <0>;
    status = "okay";
    mode_str = "1024x768M-60";
};

&ldb {
    compatible = "fsl,imx-drm" , "fsl,imx6q-ldb" ;
    status = "okay";
    lvds-channel@0 {
        #address-cells = <1>;
        #size-cells = <0>;
        reg = <0>;
        fsl,data-mapping = "spwg";
        fsl,data-width = <24>;
        primary;
        status = "okay";
        crtc = "ipu1-di0";
        display-timings {
            native-mode = <&timing0>;
            timing0: hsd100pxn1 {
                clock-frequency = <65000000>;
                hactive = <1024>;
                vactive = <768>;
                hback-porch = <160>;
                hfront-porch = <24>;
                vback-porch = <26>;
                vfront-porch = <3>;
                hsync-len = <128>;
                vsync-len = <6>;
                hsync-active = <0>;
                vsync-active = <0>;
                de-active = <1>;
                pixelclk-active = <0>;
            };
        };
        port {
            lvds0_out: endpoint {
                remote-endpoint = <&ipu1_di0_lvds0>;
            };
        };
    };
    lvds-channel@1 {
        status = "disabled";
    };
};

&ipu1 {
    compatible = "fsl,imx6q-ipu";
    reg = <0x02400000 0x400000>;
    interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>, <0 5 IRQ_TYPE_LEVEL_HIGH>;
    clocks = <&clks IMX6QDL_CLK_IPU1>, <&clks IMX6QDL_CLK_IPU1_DI0>,
             <&clks IMX6QDL_CLK_IPU1_DI1>, <&clks IMX6QDL_CLK_IPU1_DI0_SEL>,
             <&clks IMX6QDL_CLK_IPU1_DI1_SEL>, <&clks IMX6QDL_CLK_LDB_DI0>,
             <&clks IMX6QDL_CLK_LDB_DI1>;
    clock-names = "bus", "di0", "di1", "di0_sel", "di1_sel", "ldb_di0", "ldb_di1";
    resets = <&src 2>;
    bypass_reset = <0>;
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_ipu1>;
    status = "okay";
    port@2 {
        #address-cells = <1>;
        #size-cells = <0>;
        reg = <2>;
        ipu1_di0_lvds0: endpoint@3 {
            reg = <3>;
            remote-endpoint = <&lvds0_out>;
        };
    };
};

BUILD Configuration